Cadence Design Systems Inc (CDNS) — Q3 2017 Earnings Call Transcript

Thank you, Jennifer, and welcome, everyone, to our third quarter 2017 Earnings Conference Call. With me today are Lip-Bu Tan, President and CEO; and John Wall, Senior Vice President and CFO. The webcast of this call can be accessed through our website, cadence.com, and will be archived through December 15, 2017. A copy of today's prepared remarks will also be available on our website at the conclusion of today's call. Next, please note that today’s discussion will contain forward-looking statements and that our actual results may differ materially from those expectations. For information on the factors that could cause a difference in our results, please refer to our filings with the Securities and Exchange Commission. These include Cadence's most recent reports on Form 10-K and Form 10-Q, including the company's future filings, and the cautionary comments regarding forward-looking statements in the earnings press release issued today. Note that this afternoon, we filed our 10-Q for the quarter ended September 30, 2017. In addition to financial results prepared in accordance with Generally Accepted Accounting Principles, or GAAP, we will also present certain non-GAAP financial measures today. Cadence management believes that in addition to using GAAP results in evaluating our business, it can also be useful to review results using certain non-GAAP financial measures. Investors and potential investors are encouraged to review the reconciliation of non-GAAP financial measures with their most direct comparable GAAP financial measures or results, which can be found in the Quarterly Earnings section of the Investor Relations portion of our website. Additionally, a copy of today's press release dated October 26, 2017, for the quarter ended September 30, 2017, and related financial tables and our CFO commentary, which was included in our 8-K filing today, can also be found in the Investor Relations portion of our website. Today, following Lip-Bu's remarks, John Wall will present the financial results and outlook. Then Lip-Bu and John will be available during the question-and-answer period. And now I will turn the call over to Lip-Bu.

Good afternoon, everyone, and thank you for joining us today. Cadence achieved excellent operating results for the third quarter through consistent execution and broad-based proliferation and adoption of digital and signoff, custom-analog and IP solutions. John will provide more details on this in a few minutes. There is a favorable dynamic that is benefiting the semiconductor industry, EDA and Cadence, driven by growth in emerging technologies trends such as machine learning, IoT, edge computing and autonomous driving. Now let us take a closer look at our highlights from Q3, starting at the customer and ecosystem level. Cadence is collaborating with Xilinx, ARM and TSMC to build the first test chip for Cache Coherent Interconnect for Accelerators, or CCIX, using the TSMC 7-nanometer FinFET process. This chip contains Cadence IP and is designed using a full Cadence design flow. Applications such as big data analytics, search, machine learning and 5G wireless will benefit from CCIX. We signed an agreement with long-time customer, Dialog Semiconductor, where we have grown to become their prime EDA partner based on the strength of our mixed-signal solution. They are now using our latest products in simulation and digital implementation. In Q3, we extended our collaboration with Hitachi for system design enablement, spanning chip-level to PCB-level mixed-signal designs with thermal analysis, hardware/software codesign, co-verification to address functional safety requirements. InvenSense business unit of TDK that develops sensor SOCs expanded their use of our mixed-signal design solution. TSMC recognized Cadence with 3 Partner of the Year awards for the joint development of both 7-nanometer FinFET Plus and 12-nanometer FinFET Compact design infrastructure as well as for the joint delivery of automotive design enablement platform. Now I will move on to products highlights. Digital and signoff revenue grew 15% year-over-year in Q3, driven by increasing proliferation with market-shaping customers and broadening adoption by other customers. In terms of specific highlights, a global marquee company and a key IP partner expanded and deepened their investment in Cadence technology, including our digital solutions. Quantenna Communications, a leader in carrier-class WiFi chips, adopted our full digital flow, including Genus Synthesis, Innovus Implementation and Tempus for timing signoff. More than 80 customers have now deployed our digital and signoff products for advanced node designs, with more than 35 of those for 7-nanometer designs. IP revenue grew 14% year-over-year in Q3 as our refined synergy continues to achieve strong results under the leadership of Babu Mandava. In Q3, we expanded our relationship with a large Asian memory chip maker for LPDDR4, PCI Express Gen4, NAND flash PHYs and Tensilica DSPs, which is the foundation for their next generation platform. We delivered a comprehensive automotive IP portfolio for TSMC's 16-nanometer FinFET automotive process technology that includes our flagship DDR and PCI Express PHYs price and controllers. Tensilica continues to be the market leader for audio signal processing, and adoption is growing for our DSPs that are tuned for vision and neural networks. In Q3, 10 customers licensed Tensilica IP, including 5 in China, where four of the five China customers were new. For system design and verification, momentum continues for Xcelium, our parallel logic simulator, which added more than 15 new customers in segments, including mobile, communication, storage and memory. More than 50 customers have now adopted Xcelium. Palladium Z1 is the most advanced emulator in the market. In Q3, building on the comprehensive software relationship, Marvell expanded its investment in Palladium Z1 to extend emulation use to all its engineering projects. The new Protium S1 FPGA-based prototyping system continues to gain traction in Q3 with 17 purchases, 9 of which were repeat orders. Revenue growth has been strong this year for our custom and analog design solutions, up 12% year-over-year for Q3, as increasing complexity is driving increased need for advanced node custom design and simulation solutions. Our system interconnect and analysis solutions grew 7% year-over-year for Q3, with growth in PCB implementation, IC packaging and Sigrity power integrity analysis. Before turning to John, let me quickly summarize my comments. Consistent execution and broad-based proliferation and adoption of our solutions drove excellent financial results. Semiconductors, EDA and Cadence are benefiting from a number of emerging technology trends. Proliferation of our digital and signoff solutions continues to grow with market-shaping customers, and adoption is broadening to other customers. IP growth has rebounded this year to over 10% with our refined strategy. Custom and analog growth is strong as both large and small customers have been adding capacity. John will now review the financial results and provide our outlook.

Thanks, Lip-Bu, and good afternoon, everyone. Strong demand for our products and consistent execution enabled Cadence to deliver excellent operating results for the third quarter, highlighted by revenue, non-GAAP operating margin and EPS at or above the high end of our guidance range, as well as strong cash flow. First, I will go through the key results starting with the P&L. Total revenue was $485 million, up 9% over the year-ago quarter. Digital and signoff, custom/analog and IP revenue were strongest, with functional verification modestly below the Q3 2016 level. The mix per revenue recognized over time was approximately 90%. Non-GAAP operating margin was 27.5% as a result of higher software and IP revenue and maintaining a diligent focus on cost. GAAP net income per share was $0.29, non-GAAP net income per share was $0.35, up 17% year-over-year. Now turning to the balance sheet and cash flow. Cash and short-term investments were $682 million at quarter-end, of which $187 million was in the U.S. We had $650 million of long-term debt outstanding at quarter-end. We repurchased $50 million worth of Cadence shares in Q3, and we expect to continue repurchasing shares in Q4. Operating cash flow was $89 million, and DSOs were 34 days. Next, I will present the outlook for Q4 and fiscal 2017. For Q4, we expect revenue in the range of $490 million to $500 million, with approximately 90% of revenue expected to come from beginning backlog; non-GAAP operating margin of approximately 30%; GAAP EPS in the range of $0.26 to $0.28; and non-GAAP EPS in the range of $0.38 to $0.40. Based on this Q4 outlook, we now expect fiscal 2017 to look like this: revenue in the range of $1.931 billion to $1.941 billion, non-GAAP operating margin of 27% to 28%, GAAP EPS in the range of $1.04 to $1.06, non-GAAP EPS of $1.39 to $1.41, and operating cash flow in the range of $450 million to $480 million. Please note that we increased our fiscal year outlook for revenue, EPS and cash flow. You will find guidance for additional items in the CFO commentary. Next, I want to discuss our preparations for the new revenue accounting standard known as ASC Topic 606, which Cadence is required to implement for fiscal 2018. My team and I have spent a lot of time on the new standard, and previously, we said that we expect to substantially retain revenue-over-time treatment. Here is an update for where we stand today in our preparations. We expect our revenue-over-time mix to remain at approximately 90%. In the year of adoption, we expect that our revenue under the new standard will be slightly lower than under the old standard. This results from a one-time accounting adjustment to retained earnings upon adoption of the new standard. We are using the modified retrospective transition method, which means that during the year of adoption, we will report revenue under both the new and old standard for 2018. There will be no impact on cash flow or the economics of the business. By 2019, we do not expect a material difference in what revenue or expenses would have been under the old and new standard. Now to conclude my remarks, Cadence just completed a very strong quarter; we raised our numbers for the year, and I'm looking forward to working closely with Lip-Bu and the rest of the company to continue to drive more success going forward. And with that, operator, we'll now take questions.

First one, John, just on the housekeeping on the ASC 606. In FY '18, would your ratable revenue still be around 90%? Or is it going to be a transition year?

Yes, we continue to expect to remain at approximately 90% of the revenue over time.

And then on the op margin, it looks like you're doing pretty well like 27% or 28% this year, run rate of almost 30% in Q4. Should we expect the high 20s or trending towards 30% would be the new norm for op margins?

At this point, we're not giving any guidance for 2018. Everything that we know was in our guidance for Q4.

I have a question for Lip-Bu. The memory industry is undergoing significant transformation with new applications being utilized, and we're also witnessing similar changes in the logic foundry side concerning processing power and storage. I'm trying to understand how this will affect Cadence in the long run. While I know that memory designs haven't been a significant part of the mix for EDA companies overall, I'm curious how these new developments, particularly in AI, will enhance computing or processing power and storage capabilities in relation to EDA design for Cadence.

Yes, Krish, thank you for the questions. And this is a very important question. First of all, as you know, right now, with all the edge computing and big data analytics, storage and memory become more critical because of the latency and local access. So more and more it becomes memory-centric designs for a lot of data centers and edge computing. Memory is becoming very important to us. And that's why I think we mentioned about an Asian big memory company adopting some of our key IPs beside the tools. We put a lot more effort into the memory storage side because of this major trend that I see. In my remarks, I mentioned edge computing, IoT, and autonomous driving, and that are critical. We have a lot to offer besides our DDR, the memory and other PCIe IPs, and also Tensilica is playing a very important role. Another part is some of these mixed-signal solutions become critical to some of these memory players and storage players. And we are excited about this. In fact, we announced Legato Memory Solution, which is the first integrated memory design and verification solution, addressing the opportunity for us.

And then just a final question. Of your total revenue, what percentage is from systems? And what percentage of your total revenues is from the auto industry?

Your question is how many percent of our revenue is from systems? Roughly about 40%. It's difficult to break down because some companies, they have the silicon, they also have the system, and it's hard to divide it. The overall trend, as I mentioned earlier, besides EDA, we are moving towards system design enablement. We target a couple of verticals that are very important to our future growth. That is a huge opportunity for us, like automotive and ADAS-related applications, same thing with cloud data centers and that are very exciting. And then the other part is this whole industrial IoT. Back to our question about storage and latency issue; to me, it's a very huge opportunity for us to pursue in these verticals that are growing and represent a much bigger TAM market for us.

If I can just squeeze one last; I apologize for this. Would like applications like ADAS, would you characterize this as systems? Since it's part of silicon, it is part of your core EDA business?

For the ADAS, there are some companies that are providing the system. In fact, in our last earnings call, we mentioned about an ADAS system company using our PCIE Gen 4 IP on their new advanced 7-nanometer process. That's just one example of working with a system company, Tier one or OEM. The other part is very important to us; some semiconductor players, we mentioned about the top 5 semiconductor companies in automotive. Automotive semiconductor companies are using our Cadence IP, and many of them are also using our mixed-signal design flow. Some parts of automotive lidar applications are using our Tensilica engine. For example, ROHM, last quarter, we've highlighted that. I think all in all, you can slowly track us and see how successful we are in these verticals we're pursuing, and because of the trend changing, it's exciting for us in terms of growing opportunity we have with our system design enablement strategy.

I had two. The first one is kind of more on the ASP and how you're going to sell to your customers. As the chips get more complicated, you go to MCM modules or GPUs and things like that. But do you guys have any ability to raise prices? Or how does the pricing mechanism work as the chips get more complex?

In terms of EDA pricing, clearly, it's a competitive market, varies from sector to sector and product to product. But we are very disciplined and value-driven. I strongly believe in driving value by working closely with the customer, collaborating closely with them, and building deep partnerships within our ecosystems. We raise prices every 2 years, disciplined across all the product lines. The chip is getting more complex, with more design challenges and complexity. That’s why our tools shine; we really drive technology leadership. Since mid-2014, we’ve developed 25 organically new products. Customers love it because these new products are disruptive and help them design very complex chips and simulate, verify quicker so that they can deliver to customers faster. All our investments right now are showing great results. Look at digital; we're growing at 15%. Custom analog has grown 12%, and IP is growing at 14%. We are very pleased with the results.

My second one is more geographic-focused. China has been a lever of growth for you guys for a good couple of years now. Is there any change there? Is there additional investment? How do we think about that geography as we look at '18 and beyond? I'm not looking for guidance but maybe just the long-term trend if there's anything to be aware of that's changing either positive or negative?

First of all, China is a very fast-growing opportunity for us, and we are very well positioned in China. The Chinese government is very committed to building their domestic semiconductor industry with a significant investment. We are well-positioned there in terms of tools and IPs, and we work with all leading customers. I go there every month because it's critical next to the U.S. China has become a huge platform of opportunity. If you look at global semiconductor growth, it might be single-digit growth, but China is growing at 20-plus percent, with many funding available. It’s an exciting space, and we continue to position and commit to that region.

My first question is on the functional verification and emulation. The revenues there are dropping year-on-year for 3 quarters in a row. Can you just talk about what is happening in that market? And why are we not seeing growth?

On the verification side, we have this verification suite that consists of Jasper for formal verification. Previously we had Incisive, but we bought Rocketick, and completely rewrote the tool. Right now we have Xcelium, which has more than 15 new customers this quarter. We have a total of 50 adopting and using our Xcelium. We're excited about this new tool. Palladium is the most advanced emulator, and we are comfortable with the business. We highlight Marvell adopting for audio engineering design projects. Last quarter, we highlighted HiSilicon, expanding their capacity. It’s a lumpy business, but we're confident continuing to be the best in the marketplace. The other part is we're quietly building up Protium, which is the FPGA-based prototyping. That uses the same compiler so that the customer can scale from prototyping to our massive Palladium Z1 seamlessly. We are focused on the verification suite with a couple of new products. Just like we did in digital a couple of years ago, we're going to continue driving innovation. Some of these new products, customers love, and we're going to continue engaging with them. Stay tuned, over time, and you will see excellent performance from them.

And Farhan, this is John here. I'll just remind you that last year was a record year for functional verification.

Is the decline from last year predominantly driven by hardware? Or is there something else going on?

Yes, we’re happy with the performance of our hardware business. The pipeline looks good, and we have a disciplined approach to converting that pipeline to revenue. The secular trend in demand for hardware capacity remains intact, but there may be some lumpiness to quarterly results.

Overall, we are very proud of the Q3 results, and clearly, our software that is recurring is doing very well. Our IP's refined strategy is working, and I am confident that we will exceed the 10% goal we set for growth this year.

And then I have a quick question on the IP side. You talked about Tensilica being used in the AI side. The DSP technology has seen significant advantages when it comes to power for compute, and it's well-suited for client applications of AI. What kind of opportunity do you see over the long term? Have you done any kind of market sizing in terms of how large that market could potentially be for you three years from now?

Overall, our IP refined strategy is focused on the vertical market we try to go after; the most advanced process nodes and also the top-tier customer that we're focusing on, making more standard off-the-shelf IP. Saying that, we are quietly building up the star IP. Tensilica is one of the key star IPs because of their programmability, low power, and scalability suitable for IoT and machine learning for edge computing. This is where we’re focusing; there’s a lot of knowledge to be applied. Internally, our EDA tools use machine learning to optimize the inference, we can draw experience, be quicker to accelerate and come to closures for that. Overall, Tensilica is a good DSP engine, but we need to be on top of it with the compiler, kernel, and software to optimize it; working with industry standards and players in the application layer. There is a substantial opportunity here, especially in machine learning and deep learning across various vertical markets. Meanwhile, we’re applying it to our tool and optimizing product performance at the customer level.

Let me start by asking about your customer concentration. If you could comment on trends in customer concentration. Your top 10 customers typically account for about 40% to 50% of the business. It seems likely that you probably developed a couple of customers in the last couple of years that are mid-single-digit percentage of the business. So could you talk about the direction of that concentration? Will you see more customers accounting for a larger percentage of the business, or do you think it might gravitate towards being more spread out?

I'm pleased to share that we have no customer more than 5% of our revenue. We have a very broad customer base. Overall, I think we're excited about the broad distribution area. We are moving from semiconductor to a lot of systems customers, and now pursuing hyperscale web services and service providers. This allows us to broaden our customer base with marquee names and significant customer-shaping dynamics. We are in a strong position, and we like our business growth. It’s a diversified customer base. We also have a strong analog mixed-signal segment, and many PCB customers being in the thousands gives us a strong base. We are well positioned and have stable customer relationships. Pursuing the most advanced process nodes with complex digital designs is gaining traction.

I would just add that looking at our AOR and our DSOs would give you a misleading view of customer concentration because ours are normally very good. Our AORs and DSOs include all of our customer base, and as Lip-Bu said, the top customers represent about 5% to 6%. Our top 25 customers account for about 25% of our revenue.

Just to finish up on emulation. Remind us what your thoughts were for the year in terms of how you thought emulation would play out for 2017. Your 10-Q shows that your hardware cost of revenues were down year-over-year. If we exclude the inventory adjustment in Q3 last year, there would be an organic increase in your cost of revenue for hardware. Would it be fair to say that you might have held back deliberately on emulation because you had upside elsewhere in the business? You've mentioned a disciplined pipeline approach.

What I would say is that like we always said, we have a disciplined and value-driven approach to pricing on our hardware business. Our margins for Q3 were better than they were in the first half, so I wouldn't read too much into lower cost of goods sold. We're happy with the performance of our business, and our pipeline looks good. That disciplined approach is helping us convert that pipeline to revenue. The secular trend in demand for hardware capacity remains intact. There may be some lumpiness in quarterly results. Overall, we're happy with the business, but we’re comparing against a record year last year.

Congrats on the promotion, John. I want to start with the question about deferred revenue, both short and long-term. It looks like those metrics have decreased for three consecutive quarters, and the dollar value isn't small as a percentage of what you typically report for year-end backlog. Can you share with us if that's an indicator of overall backlog trends? Which product group generally has the most upfront payments and carries deferred revenue?

I wouldn't read too much into it. At Cadence, we try to match revenue timing with cash flows and the economic value transferred to customers. Deferred revenue from any quarter is a reflection of our timing of billings.

We are mindful of customer consolidation; however, nothing material right now. We've successfully managed through consolidations with minimal impact on 2017 revenue. We're growing the business and the complexity of design is increasing. This consolidation is well managed, and we are continuing to grow. We have no customer being over 5% to 6% of our revenue, which contributes to a broader customer base and a healthy portfolio.

Sorry, I also have one on emulation. Last call, you mentioned emulation was weak, with expectations for it to peak in the second half. Q3 was notably lower from Q-on-Q. Could you add some color there?

Monika, on the Q2 earnings call, we expected hardware to be a little stronger in the second half. As you know, we've said that the hardware business is inherently lumpy in nature. At times, visibility can be challenging. We believe Z1 remains the most advanced emulator in the market. In Q3, some large customers, including Marvell, expanded their Z1 capacity. We're happy with how our hardware business is currently positioned. Overall, our business did great in Q3, especially software and IP being particularly strong. We've increased the outlook for the year.

Siemens is a great company, and their revenue is over $100 billion, which we respect a lot. Mentor remains to be competitive under Siemens leadership. We’re monitoring them closely in terms of their product line and hardware emulation development. We have lots of respect for them and are looking forward to seeing what they accomplish.

Then Lip-Bu, my last question. We've seen trends in the industry like industrial IoT, autonomous driving, more silicon content in autos, machine learning, and AI. Could you talk about how these trends impact the EDA industry in general, and specifically how they could impact Cadence?

I highlighted in our remarks that we are excited about emerging technology trends. The machine learning and deep learning space is just beginning. Big companies are doubling down on machine learning and deep learning development, while new startups are exploring new architectures and compilers. We are excited to support them in terms of tools and IPs for their success. Both big and small companies are addressing this issue. In autonomous driving, a lot of sensor companies, from cameras to lidar, drive some scale in terms of refractive improvement. We are well positioned to ensure that they are using our Cadence flow. Our focus is on pursuing the edge computing, data center, and IoT opportunities, and we are poised to have them win using our tools and IP in that context. All in all, it's very exciting for us.

Is there any way quantitatively to size it, like it could add 100 basis points, grow 200 basis points?

It's a little bit too early, and we haven't spent time quantifying it. We are busy engaging with our customers to ensure that they get the tools optimized for their designs. We will look into it; however, the opportunities are genuinely exciting.

In closing, through innovation and execution, we are well positioned to build on the success of our system design enablement strategy to further proliferate our solution with a broader base of customers. I would like to thank all our shareholders, customers and partners, Board of Directors, and my executive team and hard-working employees for their continued support. Thank you all for joining us this afternoon.